FIDELIX Analog outputs
Detaljer
- Typ
- Drivrutin
- Upplaggd av
- Ove Jansson, Abelko Innovation
- Version
- 1
- Uppdaterad
- 2013-08-27
- Skapad
- 2013-08-27
- Kategori
- IO enheter, Modbus
- Visningar
- 2671
Beskrivning
Device definition for FIDELIX Analog outputs
Bruksanvisning
See Fidelix I/O-module specifications (pdf)
Juridisk information
Alla skript tillhandahålls i befintligt skick och all användning sker på eget ansvar. Felaktig använding kan leda till skadad eller förstörd utrustning.
Skript kod
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Device definition for FIDELIX Analog outputs
%
% Settings module:
% Parity: None
% Baud: 9600
% Mode: RTU
%
% Author: Peter Widetun, ABELKO AB Luleå
% History: 2009-01-12
%
DEVICETYPE FidelixAOUT NAMED "Fidelix AU" TYPEID 21221 IS
PARAMETER
Id : "Adress";
AU1 : "Analog ut 1" ["V"];
AU2 : "Analog ut 2" ["V"];
AU3 : "Analog ut 3" ["V"];
AU4 : "Analog ut 4" ["V"];
AU5 : "Analog ut 5" ["V"];
AU6 : "Analog ut 6" ["V"];
AU7 : "Analog ut 7" ["V"];
AU8 : "Analog ut 8" ["V"];
PUBLIC
PRIVATE
BAUDRATE 9600;
CHECKSUM MODBUS SWAPPED;
TELEGRAM AnalogOutput NAMED "Ställ AU" IS
QUESTION
DATA[0] := BYTE(Id); % Modbus unit address
DATA[1] := HEX(10); % Modbus command "0x10" write multiple registers
DATA[2] := RWORD(0); % start register
DATA[4] := RWORD(8); % number of registers to write
DATA[6] := BYTE(16); % number of bytes
DATA[7] <- RWORD(IF AU1<0 THEN DATA := 0;
ELSIF AU1<10 THEN DATA := AU1*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[9] <- RWORD(IF AU2<0 THEN DATA := 0;
ELSIF AU2<10 THEN DATA := AU2*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[11]<- RWORD(IF AU3<0 THEN DATA := 0;
ELSIF AU3<10 THEN DATA := AU3*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[13]<- RWORD(IF AU4<0 THEN DATA := 0;
ELSIF AU4<10 THEN DATA := AU4*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[15]<- RWORD(IF AU5<0 THEN DATA := 0;
ELSIF AU5<10 THEN DATA := AU5*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[17]<- RWORD(IF AU6<0 THEN DATA := 0;
ELSIF AU6<10 THEN DATA := AU6*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[19]<- RWORD(IF AU7<0 THEN DATA := 0;
ELSIF AU7<10 THEN DATA := AU7*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[21]<- RWORD(IF AU8<0 THEN DATA := 0;
ELSIF AU8<10 THEN DATA := AU8*102.3;
ELSE DATA := 1023;
ENDIF;
);
ANSWER SIZE 8
DATA[0] = BYTE(Id);
DATA[1] = HEX(10);
%DATA[2] = RWORD(0); % start register
%DATA[4] = RWORD(8); % number of registers to write
TIMEOUT 1000
END;
END;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Device definition for FIDELIX Analog outputs startvalue
%
% Settings module:
% Parity: None
% Baud: 9600
% Mode: RTU
%
% Ställ startvärde mellan 0 och 10 volt för aktivering
% Alla andra värden deaktiverar startvärdet.
%
% Author: Peter Widetun, ABELKO AB Luleå
% History: 2009-01-12
%
DEVICETYPE FidelixAOUTp NAMED "Fidelix AUstart" TYPEID 21222 IS
PARAMETER
Id : "Adress";
AU1 : "Startvärde AU1" ["V"];
AU2 : "Startvärde AU2" ["V"];
AU3 : "Startvärde AU3" ["V"];
AU4 : "Startvärde AU4" ["V"];
AU5 : "Startvärde AU5" ["V"];
AU6 : "Startvärde AU6" ["V"];
AU7 : "Startvärde AU7" ["V"];
AU8 : "Startvärde AU8" ["V"];
PUBLIC
PRIVATE
Tmp;
BAUDRATE 9600;
CHECKSUM MODBUS SWAPPED;
TELEGRAM AnalogOutput NAMED "Ställ AU start" IS
QUESTION
DATA[0] := BYTE(Id); % Modbus unit address
DATA[1] := HEX(10); % Modbus command "0x10" write multiple registers
DATA[2] := RWORD(8); % start register
DATA[4] := RWORD(9); % number of registers to write
DATA[6] := BYTE(18); % number of bytes
DATA[7] <- RWORD(Tmp := 0;
IF AU1<0 OR AU1>10 THEN
DATA := 0;
ELSE
DATA := AU1*102.3 + 32768;
Tmp := 1;
ENDIF;
);
DATA[9] <- RWORD(IF AU2<0 OR AU2>10 THEN
DATA := 0;
ELSE
DATA := AU2*102.3 + 32768;
Tmp := Tmp + 2;
ENDIF;
);
DATA[11]<- RWORD(IF AU3<0 OR AU3>10 THEN
DATA := 0;
ELSE
DATA := AU3*102.3 + 32768;
Tmp := Tmp + 4;
ENDIF;
);
DATA[13]<- RWORD(IF AU4<0 OR AU4>10 THEN
DATA := 0;
ELSE
DATA := AU4*102.3 + 32768;
Tmp := Tmp + 8;
ENDIF;
);
DATA[15]<- RWORD(IF AU5<0 OR AU5>10 THEN
DATA := 0;
ELSE
DATA := AU5*102.3 + 32768;
Tmp := Tmp + 16;
ENDIF;
);
DATA[17]<- RWORD(IF AU6<0 OR AU6>10 THEN
DATA := 0;
ELSE
DATA := AU6*102.3 + 32768;
Tmp := Tmp + 32;
ENDIF;
);
DATA[19]<- RWORD(IF AU7<0 OR AU7>10 THEN
DATA := 0;
ELSE
DATA := AU7*102.3 + 32768;
Tmp := Tmp + 64;
ENDIF;
);
DATA[21]<- RWORD(IF AU8<0 OR AU8>10 THEN
DATA := 0;
ELSE
DATA := AU8*102.3 + 32768;
Tmp := Tmp + 128;
ENDIF;
);
DATA[23]<- RWORD(DATA := Tmp;); % Enable AU
ANSWER SIZE 8
DATA[0] = BYTE(Id);
DATA[1] = HEX(10);
%DATA[2] = RWORD(8); % start register
%DATA[4] = RWORD(8); % number of registers to write
TIMEOUT 1000
END;
END;
% Device definition for FIDELIX Analog outputs
%
% Settings module:
% Parity: None
% Baud: 9600
% Mode: RTU
%
% Author: Peter Widetun, ABELKO AB Luleå
% History: 2009-01-12
%
DEVICETYPE FidelixAOUT NAMED "Fidelix AU" TYPEID 21221 IS
PARAMETER
Id : "Adress";
AU1 : "Analog ut 1" ["V"];
AU2 : "Analog ut 2" ["V"];
AU3 : "Analog ut 3" ["V"];
AU4 : "Analog ut 4" ["V"];
AU5 : "Analog ut 5" ["V"];
AU6 : "Analog ut 6" ["V"];
AU7 : "Analog ut 7" ["V"];
AU8 : "Analog ut 8" ["V"];
PUBLIC
PRIVATE
BAUDRATE 9600;
CHECKSUM MODBUS SWAPPED;
TELEGRAM AnalogOutput NAMED "Ställ AU" IS
QUESTION
DATA[0] := BYTE(Id); % Modbus unit address
DATA[1] := HEX(10); % Modbus command "0x10" write multiple registers
DATA[2] := RWORD(0); % start register
DATA[4] := RWORD(8); % number of registers to write
DATA[6] := BYTE(16); % number of bytes
DATA[7] <- RWORD(IF AU1<0 THEN DATA := 0;
ELSIF AU1<10 THEN DATA := AU1*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[9] <- RWORD(IF AU2<0 THEN DATA := 0;
ELSIF AU2<10 THEN DATA := AU2*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[11]<- RWORD(IF AU3<0 THEN DATA := 0;
ELSIF AU3<10 THEN DATA := AU3*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[13]<- RWORD(IF AU4<0 THEN DATA := 0;
ELSIF AU4<10 THEN DATA := AU4*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[15]<- RWORD(IF AU5<0 THEN DATA := 0;
ELSIF AU5<10 THEN DATA := AU5*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[17]<- RWORD(IF AU6<0 THEN DATA := 0;
ELSIF AU6<10 THEN DATA := AU6*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[19]<- RWORD(IF AU7<0 THEN DATA := 0;
ELSIF AU7<10 THEN DATA := AU7*102.3;
ELSE DATA := 1023;
ENDIF;
);
DATA[21]<- RWORD(IF AU8<0 THEN DATA := 0;
ELSIF AU8<10 THEN DATA := AU8*102.3;
ELSE DATA := 1023;
ENDIF;
);
ANSWER SIZE 8
DATA[0] = BYTE(Id);
DATA[1] = HEX(10);
%DATA[2] = RWORD(0); % start register
%DATA[4] = RWORD(8); % number of registers to write
TIMEOUT 1000
END;
END;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Device definition for FIDELIX Analog outputs startvalue
%
% Settings module:
% Parity: None
% Baud: 9600
% Mode: RTU
%
% Ställ startvärde mellan 0 och 10 volt för aktivering
% Alla andra värden deaktiverar startvärdet.
%
% Author: Peter Widetun, ABELKO AB Luleå
% History: 2009-01-12
%
DEVICETYPE FidelixAOUTp NAMED "Fidelix AUstart" TYPEID 21222 IS
PARAMETER
Id : "Adress";
AU1 : "Startvärde AU1" ["V"];
AU2 : "Startvärde AU2" ["V"];
AU3 : "Startvärde AU3" ["V"];
AU4 : "Startvärde AU4" ["V"];
AU5 : "Startvärde AU5" ["V"];
AU6 : "Startvärde AU6" ["V"];
AU7 : "Startvärde AU7" ["V"];
AU8 : "Startvärde AU8" ["V"];
PUBLIC
PRIVATE
Tmp;
BAUDRATE 9600;
CHECKSUM MODBUS SWAPPED;
TELEGRAM AnalogOutput NAMED "Ställ AU start" IS
QUESTION
DATA[0] := BYTE(Id); % Modbus unit address
DATA[1] := HEX(10); % Modbus command "0x10" write multiple registers
DATA[2] := RWORD(8); % start register
DATA[4] := RWORD(9); % number of registers to write
DATA[6] := BYTE(18); % number of bytes
DATA[7] <- RWORD(Tmp := 0;
IF AU1<0 OR AU1>10 THEN
DATA := 0;
ELSE
DATA := AU1*102.3 + 32768;
Tmp := 1;
ENDIF;
);
DATA[9] <- RWORD(IF AU2<0 OR AU2>10 THEN
DATA := 0;
ELSE
DATA := AU2*102.3 + 32768;
Tmp := Tmp + 2;
ENDIF;
);
DATA[11]<- RWORD(IF AU3<0 OR AU3>10 THEN
DATA := 0;
ELSE
DATA := AU3*102.3 + 32768;
Tmp := Tmp + 4;
ENDIF;
);
DATA[13]<- RWORD(IF AU4<0 OR AU4>10 THEN
DATA := 0;
ELSE
DATA := AU4*102.3 + 32768;
Tmp := Tmp + 8;
ENDIF;
);
DATA[15]<- RWORD(IF AU5<0 OR AU5>10 THEN
DATA := 0;
ELSE
DATA := AU5*102.3 + 32768;
Tmp := Tmp + 16;
ENDIF;
);
DATA[17]<- RWORD(IF AU6<0 OR AU6>10 THEN
DATA := 0;
ELSE
DATA := AU6*102.3 + 32768;
Tmp := Tmp + 32;
ENDIF;
);
DATA[19]<- RWORD(IF AU7<0 OR AU7>10 THEN
DATA := 0;
ELSE
DATA := AU7*102.3 + 32768;
Tmp := Tmp + 64;
ENDIF;
);
DATA[21]<- RWORD(IF AU8<0 OR AU8>10 THEN
DATA := 0;
ELSE
DATA := AU8*102.3 + 32768;
Tmp := Tmp + 128;
ENDIF;
);
DATA[23]<- RWORD(DATA := Tmp;); % Enable AU
ANSWER SIZE 8
DATA[0] = BYTE(Id);
DATA[1] = HEX(10);
%DATA[2] = RWORD(8); % start register
%DATA[4] = RWORD(8); % number of registers to write
TIMEOUT 1000
END;
END;
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